Year of Publication
2010
Type
Conference Proceedings
Publication Title
New Design Methodologies for High Speed Low-Power 1-Bit CMOS Full Adder Circuits
Status
International
First Author
S. Wairya
Second Author
R. K. Nagaria
Third Author
S. Tiwari
Page Numbers
1-6
Status of Paper
Published
Nature
Others
Publisher
Refereed/Peer Reviewed
NA
Month of Publication
Aug