RAM SINGH

The majority of full adder (FA) circuits are implemented employing three separate modules in a hybrid logic architecture. The main distinguishing feature of these hybrid logic style-based FA cells is that each module can be individually adjusted to increase circuit performance. With pass, a high-performance 1-bit hybrid FA cell is presented. In this paper, transistor logic and transmission gate logic are used. The proposed FA circuit is realized with the help of to get the best results, you'll need 20 transistors. By using the Cadence virtuoso tool, the proposed circuit is simulated .CMOS technology with a 90-nm process.