Electronics & Communication Engineering Department
Coordinator
Dr Subodh Wairya
Lab Area: 990 Sqfeet
Room Number: EC 110

Lab Faculty: Er Sheetal Singh (Research Scholar)

Lab Assistant: Mr Kunwar Singh

Lab Staff: Mrs. Sarita Devi

Number of PCs: 15

Courses Covered

  • KEC 653B CAD of Electronics Lab_2020
  • kEC 753B VLSI Design Lab 2021
  • REC 452 Advance Electronics System Lab_2017
  • REC 554 -CAD Of Electronics Lab-I_2018
  • REC 752 Electronics Circuit Design Lab_2019 

    • KEC653B CAD of Electronics Lab_2020

    SUGGESTIVE LIST OF EXPERIMENTS

    Part A PSPICE Experiments: 1. (a) Transient Analysis of BJT inverter using step input. (b)DC Analysis (VTC) of BJT inverter 2. (a) Transient Analysis of NMOS inverter using step input. (b) Transient Analysis of NMOS inverter using pulse input. (c) DC Analysis (VTC) of NMOS inverter. 3. (a) Analysis of CMOS inverter using step input. (b) Transient Analysis of CMOS inverter using step input with parameters. (c) Transient Analysis of CMOS inverter using pulse input. (d) Transient Analysis of CMOS inverter using pulse input with parameters. (e) DC Analysis (VTC) of CMOS inverter with and without parameters. 4. Transient & DC Analysis of NAND Gate using CMOS inverter. 5. Transient Analysis of NOR Gate inverter and implementation of XOR gate using NOR gate 6. To design and perform transient analysis of D latch using CMOS inverter. 7. To design and perform the transient analysis of SR latch circuit using CMOS inverter. 8. To design and perform the transient analysis of CMOS transmission gate. 9. Analysis of frequency response of Common Source amplifiers. 10. Analysis of frequency response of Source Follower amplifiers Part B : HDL (using VHDL program module & verilog Module) VHDL PROGRAMS 1. Design and Simulation of Full Adder using VHDL program module 2. Design and Simulation of 4x1 MUX using VHDL program module 3. Design and Simulation of BCD to Excess-3 code using VHDL program module 4. Design and Simulation of 3 to 8 decoder using VHDL program module 5. Design and Simulation of JK Flip-flop using VHDL program module 6. Design and Simulation of CMOS Inverter using verilog Module

KEC753B VLSI Design Lab_2021

SUGGESTIVE LIST OF EXPERIMENTS

SUGGESTIVE LIST OF EXPERIMENTS: 1. Design and analysis of basic of logic Gates: AND, OR, NOT, NAND, NOR, XOR, XNOR. 2. Design and implementation of Half adder and Full adder using CMOS logic. 3. To simulate the schematic of the common drain amplifier. 4. To simulate the schematic of the differential amplifier. 5. To simulate the schematic of the operational amplifier. 6. Design of 3-8 decoder using MOS technology. 7. Design a 4:1 Multiplexer. 8. Design and implementation of Flip flop circuit. 9. Layout design of PMOS, NMOS transistors. 10. Layout design of CMOS inverter and its analysis.

Advance Electronics Lab (REC452)_2017
Diode:
1. To analyze all the clipper circuits using a diode.
2. To analyze all the clamper circuits using a diode.
3. To perform the transient analysis of the half-wave and full wave rectifier
circuits using a diode.
BJT:
4. To study and analyze the input and output characteristics of CE BJT amplifier.
5. To perform the transient and frequency analysis of CE BJT amplifier.
MOSFET:
6. To study the spice parameters of MOSFET and analyze the input and output
characteristics of CS MOSFET amplifier.
7. To perform the transient and frequency analysis of CS MOSFET amplifier.
OP-Amp:
8. To study and analyze the Op-Amp-based integrator circuit.
9. To study and analyze the Op-Amp-based differentiator circuit.
10. To study and analyze the RC phase shift oscillator using Op-Amp.

Beyond the syllabus:
11. To perform the transient and frequency response of MOS-based Differential
gain amplifier.
12. To study Transient Analysis of BJT Inverter using step input & DC Analysis
(VTC) of BJT Inverter.
13.To study and analyze MOS Current Mirror.

CAD OF ELECTRONICS LAB- I (REC554)_2018

PSPICE Experiments
1. (a)Transient Analysis of BJT inverter using step input.
(b)DC Analysis (VTC) of BJT inverter
2. (a)Transient Analysis of NMOS inverter using step input.
(b)Transient Analysis of NMOS inverter using pulse input.
(c)DC Analysis (VTC) of NMOS inverter.
3. (a) Analysis of CMOS inverter using step input.
(b)Transient Analysis of CMOS inverter using step input with parameters.
(c)Transient Analysis of CMOS inverter using pulse input.
(d)Transient Analysis of CMOS inverter using pulse input with parameters.
(e)DC Analysis (VTC) of CMOS inverter with and without parameters.
4. Transient & DC Analysis of NAND Gate.
5. Transient Analysis of NOR Gate inverter and implementation of XOR gate using
NOR gate
6. To plot frequency gain response of integrator and second order low pass filter.
7. Design and Simulation of a Differential Amplifier
8. Analysis of frequency response of Common Source amplifiers.
9. Analysis of frequency response of Source Follower amplifiers.
10. Analysis OPAMP based second order low pass filter and integrator
Beyond the Syllabus :
11. Design and analysis of Current Mirror ( NMOS) Wilson.
12. Design and Simulation of Instrumentation Amplifier( Op Amp based).
13. Design and Simulation of SRAM Cell (Single Bit).

REC 752: ELECTRONICS AND CIRCUIT DESIGNING LAB_2019

Experiments using CADENCE VIRTUOSO
1. CMOS Inverter :
a) Design and verify the circuit (using 180 nm technology) using transient
analysis.
b) Obtain VTC curve and threshold voltage of inverter for a specific parameter,
verify with the value of threshold voltage obtained using formula.
c) Create symbol of this inverter for further application.
2. Design NAND and NOR gate using 180 nm technology perform all the
analysis using cadence virtuoso.
3. Design XOR gate by using NAND and NOR gate. Perform transient
analysis.
4. Design 1-bit half adder using 90 nm technology and verify the circuit using
transient analysis.
5. Design Full adder using 90 nm technology and verify the circuit using
transient analysis.
6. Design a multiplexer using 90 nm technology and perform all the analysis to
verify its characteristics.
7. Design a MOS based SRAM cell using 90 nm technology and verify its
characteristics.
8. Design NOR gate using Domino logic CMOS inverter and verify its
characteristics.
9. Design CMOS transmission gate and perform all the analysis to verify its
characteristics.
10. Design XOR and XNOR gate using dynamic CMOS logic circuits and verify
its characteristics.
11. Design Layout of CMOS inverter and perform post layout analysis, Monte
Carlo analysis, Corner analysis and etc.

Softwares Available:

  • Cadence Virtuoso
  • MATLAB
  • Orcad Capture