Skip to main content



Institute of Engineering & Technology, Lucknow
अभियांत्रिकी एवं प्रौद्योगिकी संस्थान, लखनऊ
An Autonomous Constituent Institute of Dr. A.P.J. Abdul Kalam Technical University Uttar Pradesh, Lucknow


Fee Structure
Admissions 2026
Academic Calendar
Time Table & Syllabus


  • Home
  • Institute
    • Director
    • Who's Who
    • Vision & Mission
    • About Us
    • Administrative Setup
    • Governing Body
    • Academic Section
    • Student Support
    • RTI
    • Minutes of Meetings
    • Various Committee & Cells
    • Alumni
    • Corporate Mentors
    • Hostels
    • Infrastructure & Facilities
    • Important Documents
    • Mandatory Disclosures
    • Best Practices
    • Central Library
  • Departments
    • Applied Sciences and Humanities
    • Biotechnology
    • Chemical Engineering
    • Civil Engineering
    • Computer Science and Engineering
    • Electrical Engineering
    • Electronics & Communication Engineering
    • Mechanical Engineering
    • Self Finance Programmes
  • Academics
    • Dean Academics Office
    • Admission Procedure
    • Fee Structure
    • Syllabus
    • Time Table
    • Academic Calendar
    • Faculty (Regular)
    • Former Faculty
    • Faculty (Contractual)
    • Laboratories
    • NIRF Data
    • IQAC
    • Virtual Labs
    • Videos
    • Student Achievements
    • Library
    • Distinguished Alumni
  • Research
    • Research and Development Cell
    • Model Rules for Consultancy and Testing
    • Institute Internship Policy for Innovation and Startup
    • Publications
    • Book Chapters by IET Faculty
    • Books by IET Faculty
    • Patent(s) by IET Faculty
    • DSc & PhD & M.Tech Thesis Supervisions
    • Consultancy/Testing
    • Research Projects
    • FDP / Workshops Organized
    • FDP/Workshops/Seminars Participated
    • Research Scholars
    • Student Projects
  • Results
  • Placements
  • Notice
    • Admissions
    • Dean Students Welfare
    • Examinations
    • Vacancy
  • Gallery
  • Links
  • ERP
  • Contact

IEEE



Optimal Tuning of Temporary Droop Governor of Hydro Power Plant using Genetic Algorithm

  • Read more about Optimal Tuning of Temporary Droop Governor of Hydro Power Plant using Genetic Algorithm

Aggregated Effect of Active Distribution System on Available Transfer Capability Using Multi Agent System Based ITD Framework

  • Read more about Aggregated Effect of Active Distribution System on Available Transfer Capability Using Multi Agent System Based ITD Framework

Performance Analysis of Footed Quasi Resistance Scheme for Low Power VLSI Circuits

  • Read more about Performance Analysis of Footed Quasi Resistance Scheme for Low Power VLSI Circuits

A Novel Approach for Delay Variation Reduction in Domino Logic Gates using Keeper Circuit

  • Read more about A Novel Approach for Delay Variation Reduction in Domino Logic Gates using Keeper Circuit

A Survey on Different Modules of Low Power High Speed Hybrid Full Adder Circuits

  • Read more about A Survey on Different Modules of Low Power High Speed Hybrid Full Adder Circuits

Design of Power Efficient Low Offset Dynamic Latch Comparator using 90nm CMOS Process

  • Read more about Design of Power Efficient Low Offset Dynamic Latch Comparator using 90nm CMOS Process

A 0 55V 28 6ppm oC Nanopower Subthreshold Voltage Reference with Body Biasing

  • Read more about A 0 55V 28 6ppm oC Nanopower Subthreshold Voltage Reference with Body Biasing

Design and Performance of High speed Low Offset CMOS Double Tail Dynamic Comparators using Offset Control Scheme

  • Read more about Design and Performance of High speed Low Offset CMOS Double Tail Dynamic Comparators using Offset Control Scheme

A High Speed Energy Efficient CMOS Dynamic Latch Comparator for Low Voltage Applications

  • Read more about A High Speed Energy Efficient CMOS Dynamic Latch Comparator for Low Voltage Applications

Impact of Channel Doping Fluctuation and Metal Gate Work Function Variation in FD SOI MOSFET for 5nm BOX Thickness

  • Read more about Impact of Channel Doping Fluctuation and Metal Gate Work Function Variation in FD SOI MOSFET for 5nm BOX Thickness

Pagination

  • Previous page ‹‹
  • Next page ››
Subscribe to IEEE

Council/Bodies


  • E-Cell
  • IEEE Students Chapter UNIT STB62961
  • Institution's Innovation Council
  • ISSACC
  • Navyug Navachar Foundation

Co-curriculars


  • Shauryotsava
  • Electrical Engineering Society
  • Encore
  • Google Developer Student Club
  • ISSACC
  • Mechanical Engineering Forum (MEF)
  • PARMARTH
  • Society for Electronics Exploration and Development (SEED)

IET in News


  • आईईटी को मिला स्वदेशी परम शावक डीएल कंप्यूटर : Amar Ujala
  • IET student's startup idea wins 1.5L award : Times of India
  • Deep learning, AI to help patients with brain injuries : Times of India
  • IET sets up centers for green hydrogen & electric vehicles : Times of India
  • 'सात फेरे' स्टार्टअप से शादी की सब बुकिग एक ही जगह : Hindustan Times

Contact Us


Institute of Engineering & Technology,
Sitapur Road,Lucknow
Uttar Pradesh
India
Pin Code          :   226021
 

Web: https://www.ietlucknow.ac.in



© 2026 Institute of Engineering and Technology, Lucknow | Maintained @ GPCF, Computer Center, IET Lucknow, Built with ♥ using D11

sfy39587stp18