LNA performance decides the performance of wireless RF system. Many tradeoffs include in the design of LNA. The challenges involved in the design of the RF system are presented in this thesis. Description of the all-important parameter performance is given in thesis.

Many techniques are available to match the impedance but here π impedance matching network is used for input and a source follower buffer is used at output side which drives the capacitance and matching the impedance. This gives improved result, input and output reflection coefficient less than -10 dB, power gain is approximated 30 db with the average noise figure 1.8 db which is very less and the relation between input power and output power is also shown by graph if we apply -10dB at input we get 10 dB at output. Advance design system software (CAD tool) is used for simulation of all parameters and schematic design. In software many simulators are presents so we choose a particular simulator to simulate a specific parameter, for s parameter we use s-parameter simulator and select noise calculator to calculate the average noise figure of design. For simulation of the graph between inputs out power, use HB (harmonic balance) simulation. MOSFET of model no.BSIM4M1is used which is RF nMOS. Cascode topology is used for the 2 stage LNA. Comparison of the reference LNA and proposed LNA architecture is also mention in the thesis .The proposed LNA offers optimum performance considering all LNA performance parameters and proved to be a high performance LNA.   

Content Owner / Guide
Title
Wideband Low Noise Amplifier with Impedance Matching Network
Year Awarded (Blank if Not Awarded)
2020
Type
Master of Technology