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Institute of Engineering & Technology, Lucknow
अभियांत्रिकी एवं प्रौद्योगिकी संस्थान, लखनऊ
An Autonomous Constituent Institute of Dr. A.P.J. Abdul Kalam Technical University Uttar Pradesh, Lucknow


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NA



Evolution of structure of some binary group based n bit comparator n to 2n decoder by reversible technique

  • Read more about Evolution of structure of some binary group based n bit comparator n to 2n decoder by reversible technique

Feasible Methodology for optimization of a novel reversible binary compressor

  • Read more about Feasible Methodology for optimization of a novel reversible binary compressor

Cross layer Optimization of Optical Node in High Speed Network

  • Read more about Cross layer Optimization of Optical Node in High Speed Network

An Improved Feedthrough Logic for Low Power and High Speed Arithmetic Circuits

  • Read more about An Improved Feedthrough Logic for Low Power and High Speed Arithmetic Circuits

A Feasible Approach to Design a CMOS Domino Circuit at Low Power VLSI Application

  • Read more about A Feasible Approach to Design a CMOS Domino Circuit at Low Power VLSI Application

A 16 Bit Ripple Carry Adder Design Using High Speed Modified Feedthrough Logic

  • Read more about A 16 Bit Ripple Carry Adder Design Using High Speed Modified Feedthrough Logic

Cost Efficient Design of Reversible Adder Circuits for Low Power Applications

  • Read more about Cost Efficient Design of Reversible Adder Circuits for Low Power Applications

A Study of Two Stage Operational Transconductance Amplifier using Floating gate MOSFET

  • Read more about A Study of Two Stage Operational Transconductance Amplifier using Floating gate MOSFET

Frame of Reversible BCD Adder and Carry Skip BCD Adder and Optimization Using New Reversible Logic Gates for Quantum Dot Cellular Automata

  • Read more about Frame of Reversible BCD Adder and Carry Skip BCD Adder and Optimization Using New Reversible Logic Gates for Quantum Dot Cellular Automata

Approaches to Design Feasible Error Control Scheme Based on Reversible Series Gates

  • Read more about Approaches to Design Feasible Error Control Scheme Based on Reversible Series Gates

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Council/Bodies


  • E-Cell
  • IEEE Students Chapter UNIT STB62961
  • Institution's Innovation Council
  • ISSACC
  • Navyug Navachar Foundation

Co-curriculars


  • Shauryotsava
  • Electrical Engineering Society
  • Encore
  • Google Developer Student Club
  • ISSACC
  • Mechanical Engineering Forum (MEF)
  • PARMARTH
  • Society for Electronics Exploration and Development (SEED)

IET in News


  • आईईटी को मिला स्वदेशी परम शावक डीएल कंप्यूटर : Amar Ujala
  • IET student's startup idea wins 1.5L award : Times of India
  • Deep learning, AI to help patients with brain injuries : Times of India
  • IET sets up centers for green hydrogen & electric vehicles : Times of India
  • 'सात फेरे' स्टार्टअप से शादी की सब बुकिग एक ही जगह : Hindustan Times

Contact Us


Institute of Engineering & Technology,
Sitapur Road,Lucknow
Uttar Pradesh
India
Pin Code          :   226021
 

Web: https://www.ietlucknow.ac.in



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