Quantum Dot Cellular Automata Based Parity Generator And Detector: A Review Read more about Quantum Dot Cellular Automata Based Parity Generator And Detector: A Review
Design of Quantum Dot Cellular Automata Based Parity Generator and Checker with Minimum Clocks and Latency Read more about Design of Quantum Dot Cellular Automata Based Parity Generator and Checker with Minimum Clocks and Latency
Designing Conservative Reversible N-Bit Binary Comparator For Emerging Quantum-Dot Cellular Automata Nano Circuits Read more about Designing Conservative Reversible N-Bit Binary Comparator For Emerging Quantum-Dot Cellular Automata Nano Circuits
Approach to Design a High Performance Fault-Tolerant Reversible ALU Read more about Approach to Design a High Performance Fault-Tolerant Reversible ALU
A GDI Approach to Various Combinational Logic Circuits in CMOS Nano Technology Read more about A GDI Approach to Various Combinational Logic Circuits in CMOS Nano Technology
Hybrid Code Converters using Modified GDI Technique Read more about Hybrid Code Converters using Modified GDI Technique
Designing an Efficient Approach for JK and T flip-flop with Power Dissipation Analysis using QCA Read more about Designing an Efficient Approach for JK and T flip-flop with Power Dissipation Analysis using QCA
Modular Design of 2^n:1 Quantum Dot Automata Multiplexers and its Application via Clock zone based Crossover Read more about Modular Design of 2^n:1 Quantum Dot Automata Multiplexers and its Application via Clock zone based Crossover
Design of Quantum Dot Cellular Automata Based Parity Generator and Checker with Minimum Clocks and Latency Read more about Design of Quantum Dot Cellular Automata Based Parity Generator and Checker with Minimum Clocks and Latency
Designing Conservative Reversible N-Bit Binary Comparator for Emerging Quantum-Dot Cellular Automata Nano Circuits Read more about Designing Conservative Reversible N-Bit Binary Comparator for Emerging Quantum-Dot Cellular Automata Nano Circuits
