Every integrated circuit relies on power, and the global innovation guide to
semiconductors lists power usage as one of the most pressing issues. In an integrated
circuit, the clock distribution system and flip-flop clock divider typically use and make
the most internal transitions, which uses a lot of energy. The clock signal circulates via
the clock distribution system from a typical location to each and every component needed
for the circuit. Even though the synchronous framework values this capability higher, the
characteristics of these clock signals need to be taken into account. Given the high
running frequency of high capacitance, a clock distribution system consumes a lot of
power in sequential circuits.
Content Owner / Guide
Title
IMPLEMENTATION OF LOW-POWER HIGH-SPEED FREQUENCY DIVIDER USING
EDGE-TRIGGERED FLIP FLOP
EDGE-TRIGGERED FLIP FLOP
Year Awarded (Blank if Not Awarded)
2022
Type
Master of Technology
Place of Work
E-Mail
Roll No
1805267008
Registration Date