| Jyoti Garg (PhD/15/ECE/2055)
1.1 Abstract
The work carried out in this thesis is concerned with the design of electronic logic circuits using Spin Transfer Torque Magnetic Random Access Memory(STT MRAM), Spin Hall Effect(SHE) assisted STT-MRAM, Memristor. The thesis presents a detailed theory about STT-MRAM, SHE and Memristor. Several initial designs and implementations, available in literature, have been discussed for an in-depth understanding of the subject.